Shared-current electronic systems with precise proportioning

ABSTRACT

Shared-current electronic systems ( 120, 130, 140, 150, 160, 170, 180, 190 , and  200 ) include two or more solid-state electronic devices, such as a solid-state amplifying device (Q 1 ), a baseband processor ( 110 ), and a multiplier/up-converter ( 112 ), that are connected in dc series or dc series-parallel, that may be connected in rf series, and that either fixedly or variably share percentages of a dc source voltage. Various embodiments produce separate rf outputs, variably shift the phase of a single rf output, variably shift rf power between/among rf outputs, or produce a frequency-compressed modulation. The apparatus includes means ( 122, 162, 162 A, and /or  162 B) for precisely proportioning percentages of the regulated dc source voltage to the dc series-connected electronic devices irrespective of production variations in operating parameters of the electronic devices and/or drift of the electronic devices.

CROSS-REFERENCES TO RELATED APPLICATIONS

This patent application is a Continuation-in-Part of U.S. patent application Ser. No. 10/644,115, filed Aug. 20, 2003 now U.S. Pat. No. 6,900,696.

STATEMENT RE FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

(Not Applicable)

REFERENCE TO SEQUENCE LISTING

(Not Applicable)

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to connecting electronic devices in dc series, and in either rf series or parallel. More particularly, the present invention pertains to connecting electronic devices in dc series, precisely proportioning a dc source voltage to selected ones of the electronic devices irrespective of production variations in component operating parameters or drift in component parameters, and rf decoupling the dc series-connected electronic devices.

2. Description of the Related Art

Frequently, maximum operating voltages of solid-state electronic devices are too low for the dc source voltage that is available. By connecting the solid-state electronic devices in dc series, the dc source voltage may be divided between, or among, a plurality of solid-state electronic devices, either equally or proportionally, as desired, thereby providing dc voltages that are usable for any desired type of solid-state electronic device, and thereby also sharing the same dc current flow.

Since the solid-state electronic devices are stacked in series between a dc source voltage and an electrical ground, this type of electronic system has been called a “totem-pole” electronic circuit. However, since all of the solid-state electronic devices share the dc current, herein this type of electronic system is called a “shared-current electronic system.”

The dc source voltage may be divided either proportionally or variably, and other types of electronic devices, such as bandwidth processors, may be connected in dc series with an other solid-state electronic device. The inputs and outputs of the electronic devices, whether rf or lower frequencies, may be connected in either series or parallel.

As an example of equal or proportional division of the dc source voltage, gallium arsenide field-effect transistors (GaAsFETs) are the primary solid-state devices used for amplification of high frequency signals in the range of 3.0 GHz and higher. GaAsFETs have the advantages of being readily available and relatively inexpensive. However, a major disadvantage of GaAsFETs is that the maximum operating voltage is commonly +10.0 volts dc.

For many transmitter/amplifier applications, particularly airborne applications, the dc source voltage is 28.0 volts dc, plus or minus 4.0 volts dc. Since gallium arsenide FETs have an operative voltage of +10.0 volts dc, the use of gallium arsenide FETs has presented a problem.

Traditionally, there have been two solutions to this problem: linear voltage regulators and switching voltage regulators. Linear voltage regulators have the disadvantages of excessive heat generation and low power efficiency. And, switching voltage regulators have the disadvantages of increased cost, space inefficiency, and the creation of a spurious signal on the rf carrier (EMI problems) due to the switching action of the regulator.

A third approach to solving the problem of disparity between the operating voltage of solid-state devices and a dc source voltage has been to connect the solid-state electronic devices in dc series, thereby dividingly sharing the dc source voltage and utilizing the same current flow. This shared-current approach was presented in IEEE Transactions on Microwave Theory and Techniques, Volume 46, Number 12, of December 1998, in an article entitled “A 44-GHz High IP3 InP-HBT Amplifier with Practical Current Reuse Biasing.”

Shared-current electronic systems solve the problem of the disparity between the operating voltage of solid-state devices and a higher source voltage. Two or more solid-state electronic devices are connected in series for dc operation.

That is, current that flows in series through the solid-state devices is used two, or more, times in the production of the rf output. The dc current is used once in each of two, or more, series-connected solid-state electronic devices, thereby increasing the rf output for a given current flow, as compared to rf amplifiers connected in the conventional fashion.

However, shared-current electronic systems have been used only at low rf powers, as in the above-referenced article wherein the power was in the order of 100.0 milliwatts. At higher rf powers, problems associated with inadequate rf decoupling have included low power efficiency, oscillation, a decrease in reliability of the circuits, and destruction of the solid-state devices.

Power limitations with regard to aforesaid problems were solved by Lautzenhiser et al., as taught in U.S. Pat. No. 6,683,499 that issued on Jan. 27, 2004, and which is incorporated herein by reference thereto.

Although there was nothing in the literature that hinted of rf power limitations for shared-current systems, factors that might cause component failure at higher rf powers, or solutions to any such problems, Lautzenhiser et al. solved this rf power limitation of shared-current electronic systems by providing improved rf decoupling.

More particularly, Lautzenhiser et al. teach providing rf decoupling with an effective series resistance that is less than that of the best capacitors, namely porcelain capacitors. Providing rf decoupling with an effective series resistance that is lower than that of the best capacitors is achieved by paralleling porcelain capacitors. Capacitors are parallel to provide these reduced effective series resistances at single frequencies or over a band of frequencies by paralleling a plurality of capacitors that resonate at the same or spaced-apart frequencies.

While one reason for connecting solid-state devices includes the low operating voltages of GaAsFETs with respect to the dc source voltage, an other reason for connecting solid-state devices in series is to variably proportion the dc source voltage between, or among, two or more solid-state electronic devices.

The dc source voltage may be variably proportioned between, or among, two or more solid-state electronic devices for the purpose of phase shifting an rf output as taught by Lautzenhiser et al. in U.S. Pat. No. 6,690,238 which issued on Feb. 10, 2004, and which is incorporated herein by reference thereto.

The dc source voltage may also be variably proportioned for the purpose of variably shifting or proportioning, or even rapidly switching, rf power from one antenna to an other, as taught by Lautzenhiser et al. in U.S. Pat. No. 6,747,517 which issued on Jun. 8, 2004, and which is incorporated herein by reference thereto.

Further, as taught by Lautzenhiser et al., in U.S. patent application Ser. No. 10/644,115, filed Aug. 20, 2003, a solid-state electronic device, such as a FET, may be connected in dc series with a processing electronic device, such as an oscillator or a baseband processor, that may include hundreds of discrete components. By dc series-connecting the solid-state electronic device and the processing electronic device in dc series, and proportionally dividing the dc source voltage between the devices, a dc voltage suitable for each device is provided, the dc current is shared, the use of a voltage regulator is obviated, and power efficiency is increased greatly.

As taught in the above-referenced U.S. patent application, an important use of shared-current electronic systems is in spectrally-efficient digital modulation systems such as SOQPSK (Tier I) or multi-h CPM (Tier II) in which the quantity of data in a given bandwidth is doubled or tripled respectively as compared to the PCM/FM (Tier 0) waveform. Importantly, the shared-current principle also increases the power efficiency of electronic systems that use Tier 0, Tier I, and Tier II waveforms, since all three waveforms (Tier 0, Tier I, and Tier II) may be produced by the same hardware by making a change in the software.

Unless rf decoupling is provided as taught by Lautzenhiser et al. in U.S. Pat. No. 6,683,499, reduced efficiency will certainly occur, and both instability and destruction of the solid-state electronic devices may occur. More particularly, if one of the solid-state electronic devices goes into unstable self-oscillation, it will consume more dc bias and most likely become over biased resulting in destruction of the solid-state device.

In a shared-current configuration that uses FETs, all FETs may be destroyed if one FET fails, depending on how the first FET fails. For example, if the upper FET oscillates and consumes the dc bias, it will be over-biased and will be destroyed. If, in the destruction, the drain and source short circuit, which is a common type of failure, the lower FET will be over-biased, too, so that the lower FET will also fail.

Inadequate rf decoupling, at the very least results in poor efficiency. At the worst, and with higher likelihood at higher rf outputs, it results in destruction of the FETs and/or damage or destruction of circuits connected to the FET inputs and outputs.

However, even though adequate rf decoupling, as taught by Lautzenhiser et al., allows higher, and seemingly almost unlimited rf outputs, production variations of component operating parameters and drift of component operating parameters caused by aging and temperature variations combine to provide an other limitation to rf power outputs.

More particularly, when solid-state electronic components are connected in dc series between a dc source voltage and an electrical ground, an increase, or a decrease, in the percentage of the dc source voltage that is used by one of the solid-state electronic components inversely affects the percentage of the dc source voltage that is applied to the other solid-state component(s). This problem is compounded if more than two solid-state electronic components are connected in dc series.

Therefore, production variations in component parameters, with or without drift of component parameters, can cause failure of one solid-state electronic component, and failure of one electronic component can cascade into failure of other solid-state electronic components, and also cause failure of input and output devices, in like manner as described above for failures caused by inadequate rf decoupling.

The present invention overcomes this additional rf output limitation by precisely proportioning percentages of the dc source voltage that are utilized by individual ones of the several dc series-connected solid-state electronic devices irrespective of production variation of component operating parameters and drift of component operating parameters. More particularly, an electronic device that is called a “precise proportioner” is connected to lower-voltage and input terminals of all of the dc series-connected solid-state electronic devices except for the one nearest the electrical ground.

BRIEF SUMMARY OF THE INVENTION

In the present invention, two or more solid-state electronic devices, or at least one solid-state electronic device and at least one other electronic device, are connected in series between positive and negative terminals of a dc source voltage, thereby proportioning the dc source voltage between or among the electronic devices. The solid-state electronic devices may be gallium arsenide field-effect transistors (GaAsFETs) or any other type of solid-state electronic device. All of the dc series-connected electronic devices may use the same current flow, or some current may be bypassed around an electronic device that uses less current than an other current-sharing device.

Alternately, two solid-state electronic devices that use less current are connected in dc parallel in a stack with two or more solid-state electronic devices to best utilize, not only the dc source voltage, but also the current required by the power-amplifying FETs.

If the solid-state electronic devices are field-effect transistors (FETs), the FETs are stacked like a totem pole with the drain of a top, or upper, FET being operatively connected to a relatively high positive potential, a source terminal of the top FET being connected to a drain terminal of a lower FET, and a source terminal of the lower FET being connected to a lower voltage.

In some embodiments, an rf power splitter is used to split the rf input two or more ways for the gates of the FETs. In various ones of the embodiments, an rf power combiner is connected to the drain terminals of the FETs to combine the rf outputs.

A negative gate-to-source bias for the lower FET controls current flow through all FETs, which in turn controls power amplification. Various embodiments of the present invention control the gate-to-source bias of the lower FET in unique and useful ways, thereby providing unique and useful ways of controlling both current flow through the FETs and amplification of the rf power amplifier.

In addition to proportioning a dc source voltage between, or among, a plurality of solid-state amplifying devices in fixed proportions for the purpose of providing dc voltages that are usable by various types of solid-state amplifying devices, the dc source voltage may be variably proportioned between, or among, a plurality of solid-state amplifying devices.

The dc source voltage may be variably proportioned for the purpose of variably shifting a phase angle of an rf output, or the dc source voltage may be variably proportioned for the purpose of shifting rf power from one rf output and an antenna to an other rf output and its antenna.

While in some embodiments of the present invention a power combiner is used to combine the rf signals after being power amplified by the FETs, in other embodiments, the rf signals are used separately.

In still other embodiments, separate rf inputs, which may be at different frequencies, different levels, and different modulation types, are separately amplified, and then combined to produce both rf signals in a single rf output.

Finally, a solid-state electronic device may be connected in dc series with a processing electronic device that may include hundreds of discrete solid-state components. For instance, Shaped-Offset QPSK modulation (SOQPSK) is power inefficient because of the current flow that is required for modulated signal generation. However, by using the same current, both for modulated signal generation and rf power amplification, as taught herein, overall power efficiency is improved greatly.

Conventionally, rf power amplifying J-FETs are biased with a negative dc voltage applied to the gate terminal, a positive power supply dc voltage applied to the drain terminal, and the source terminal attached to a circuit ground. Preferably, however, as shown and taught herein, the source terminal of the lower FET is connected to an electrical ground through a resistor, thereby causing the FET to self-bias, eliminating the need for a negative voltage for the gate terminal.

The design and selection of the dc bias, rf chokes, and rf decoupling capacitors are critical to the operation and performance of current-sharing rf amplifier circuits, particularly in high-power rf applications, as taught by Lautzenhiser et al. in U.S. Pat. No. 6,683,499. Improperly designed dc bias circuits can result in a reduction of power efficiency, destruction of one or more amplifying FETs, or a decrease of the reliability in the solid-state devices, especially at all but the lowest rf powers.

However, even when current-sharing electronic systems are provided with proper rf decoupling, as taught herein, the maximum rf output is limited, and or reliability is sacrificed because of production variations in the operating parameters of the solid-state electronic components and drift of component operating parameters. The present invention overcomes this final limitation to the practicality of shared-current electronic systems by precisely proportioning the dc source voltage between/among the solid-state electronic components irrespective of production variations in component operating parameters and/or drift in operating parameters of the electronic components.

This precise proportioning is accomplished by clamping the dc voltage used by one of the solid-state electronic components. That is, if two solid-state electronic components are used, the one nearest the source voltage is clamped. If three, or more, solid-state electronic components are used, the dc voltages of all of the solid-state components are clamped, except for the solid-state electronic component that is nearest the electrical ground.

However, for use in phase-shifting and power-shifting circuits, where dc voltages are variably proportioned to the solid-state electronic devices, the percentages of the dc source voltage that are used by individual ones of the solid-state devices are clamped to precisely follow varying proportioning voltages that are generated by a proportioning control, thereby precisely phase or power shifting an rf output irrespective of component operating parameters.

Therefore, whether the solid-state devices are FETs, bipolar transistors, processing electronic devices, and/or bandwidth processors, the dc source voltage is precisely proportioned to each solid-state device.

In a first aspect of the present invention, electronic apparatus comprises: a solid-state electronic device that includes higher and lower dc voltage terminals; an other electronic device that includes higher and lower dc voltage terminals; means, comprising means for connecting the lower dc voltage terminal of one of the electronic devices to the higher dc voltage terminal of an other of the electronic devices, for connecting the electronic devices in dc series between a dc source voltage and an electrical ground; means, comprising a capacitor that is connected between the lower dc voltage terminal of the one electronic device and the electrical ground, for rf decoupling the dc series-connected electronic devices; and means, being connected to a proportioning voltage and to the one electronic device, for precisely proportioning preselected percentages of the dc source voltage to the one electronic device irrespective of production variations of operating parameters in one or both of the electronic devices or drift of the operating parameters in one of both of the electronic devices.

In a second aspect of the present invention, a method comprises: connecting a solid-state electronic device and an other electronic device in dc series between a dc source voltage and an electrical ground; rf decoupling the electronic devices; and precisely proportioning preselected percentages of the dc source voltage to respective ones of the electronic devices irrespective of production variations of operating parameters in one or both of the electronic devices.

In a third aspect of the present invention, electronic apparatus comprises: a processing electronic device having higher and lower dc voltage terminals; a solid-state electronic device having higher and lower dc voltage terminals; means, comprising means for connecting the lower dc voltage terminal of one of the devices to the higher dc voltage terminal of an other of the devices, for connecting the devices in dc series between a dc source voltage and an electrical ground; and means, being connected to a proportioning voltage and to the one electronic device, for precisely proportioning preselected percentages of the dc source voltage to the one electronic device irrespective of production variations of operating parameters in one or both of the electronic devices or drift of the operating parameters in one or both of the electronic devices.

In a fourth aspect of the present invention, a method comprises: rf series connecting a processing electronic device to a first solid-state electronic device; dc series connecting the first solid-state electronic device and the processing electronic device with a dc source voltage and an electrical ground; decoupling the electronic devices; and precisely proportioning a selected percentage of the dc source voltage to one of the electronic devices irrespective of production variations in operating parameters of either or both of the electronic devices.

In a fifth aspect of the present invention, a method comprises: connecting first and second electronic devices in dc parallel; connecting the first and second parallel-connected electronic devices and a third electronic device in dc series between a dc source voltage and an electrical ground; connecting the first, second, and third electronic devices in rf series; and precisely proportioning a selected percentage of a dc source voltage to one of the electronic devices irrespective of production variations in operating parameters of any of the electronic devices and/or drift of any of the electronic devices.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

FIG. 1 is an rf power amplifier, or a shared-current electronic system, in which two n-channel, gallium arsenide field-effect transistors (GaAsFETs) are connected in dc series to proportionately share, or dividingly share, the dc source voltage, and rf decoupling is included as taught in conjunction with FIG. 4;

FIG. 2 is an rf power amplifier, or a shared-current electronic system, that is similar to FIG. 1, except that the GaAsFETs of FIG. 1 have been replaced by n-channel MOSFETs;

FIG. 3 is an rf power amplifier, or a shared-current electronic system, that is similar to FIG. 1, except that the GaAsFETs of FIG. 1 have been replaced by npn bipolar-junction transistors (BJTs);

FIG. 4 is a low ESR capacitor assembly in which the effective series resistance (ESR) of rf decoupling capacitances are reduced below the ESR of any porcelain capacitor, that resonates at a given operating frequency, by paralleling a plurality of capacitors, which is used in all of the shared-current electronic systems taught herein;

FIG. 5 illustrates an operational amplifier being used as a buffer to prevent current-caused changes in a bias voltage for the shared-current electronic systems such as those of FIGS. 1–3;

FIG. 6 is a variable phase-shifting rf power amplifier, or a shared-current electronic system in which two, n-channel GaAsFETs are stacked to selectively utilize a source voltage, and in which an rf output can be shifted up to 90 degrees proportional to, and substantially linearly with, a proportioning voltage;

FIG. 7 is a power-shifting rf amplifier, electronic apparatus, or a shared-current electronic system, in which two solid-state electronic devices are connected in series between higher and lower dc source voltages, in which rf signals, which may be in quadrature, are separately amplified in the solid-state electronic devices, and in which the rf power is selectively shifted and proportioned between two separate rf outputs in response to a proportioning voltage;

FIG. 8 is a variable phase-shifting rf power amplifier, or a shared-current electronic system, in which four FETs are connected in series with a dc source voltage to utilize the dc source voltage in variably selected proportions, and in which a phase angle of an rf output can be shifted up to 270 degrees, proportional to, and substantially linear with, a proportioning control voltage and three proportioning voltages that are generated by a proportional control of FIG. 11 that is an integral part of the variable phase-shifting rf power amplifier of FIG. 8;

FIG. 9 illustrates sine waves that are phase shifted, respectively, by 0, 90, 180, and 270 degrees in the phase-shifting rf power amplifier of FIG. 8;

FIG. 10 is a variable power-shifting rf amplifier, or power-switching amplifier, in which four solid-state electronic devices are connected in series between higher and lower dc source voltages or supply voltages to utilize the dc source voltage in variably selected proportions, in which 0, 90, 180, and 270 degree rf signals are separately amplified in the four solid-state electronic devices, and the rf power is selectively proportioned, or selectively switched, among four rf outputs in response to the three proportioning voltages that are generated by the proportioning control, of FIG. 11, that is an integral part of the power-shifting rf amplifier of FIG. 10;

FIG. 11 is the proportioning control that is an integral part of both the variable phase-shifting rf power amplifier of FIG. 8 and the power-shifting rf amplifier of FIG. 10, and that generates the three proportioning voltages, in response to a proportioning-control voltage, for controlling both the phase-shifting rf power amplifier of FIG. 8 and the power-shifting rf amplifier of FIG. 10;

FIG. 12 is a shared-current electronic system in which an n-channel GaAsFET is connected in dc series with a processing electronic device;

FIG. 13 is a shared-current electronic system in which an n-channel MOSFET is connected in dc series with the processing electronic device of FIG. 12;

FIG. 14 is a shared-current electronic system in which an npn bipolar-junction transistor is connected in dc series with the processing electronic device of FIGS. 12 and 13;

FIG. 15 is a frequency-compression electronic system, or a shared-current electronic system, in which an rf output GaAsFET shares current with a baseband processing device, a multiplier/up-converter, a gain block, and a driver GaAsFET;

FIG. 16 is a frequency-compression electronic system, or a shared-current electronic system, in which the rf output GaAsFET of FIG. 15 is replaced by a MOSFET;

FIG. 17 is a frequency-compression electronic system, or a shared-current electronic system, in which the rf output GaAsFET of FIG. 15 is replaced by a bipolar-junction transistor;

FIG. 18 is an rf power amplifier, or a shared-current electronic system, that is similar to the shared-current electronic system of FIG. 1, except that a precise proportioner precisely proportions a predetermined proportion of the dc source voltage one of the GaAsFETs, so that, if the dc source voltage is closely regulated, the dc source voltage will be precisely proportioned to both of the GaAsFETs irrespective of operating parameter variations in components and/or component drift;

FIG. 19 is an rf power amplifier, or a shared-current electronic system, that is similar to the shared-current electronic system of FIG. 3, except that the dc source voltage is precisely proportioned to respective ones of the bipolar-junction transistors irrespective of operating parameter variations in components and/or component drift;

FIG. 20 is an rf power amplifier, or a shared-current electronic system in which two gallium arsenide FETs are connected in dc series and also in rf series, and the dc source voltage is precisely proportioned to respective ones of the GaAsFETs irrespective of operating parameter variations in components and/or component drift;

FIG. 21 is an rf power amplifier, or a shared-current electronic system in which two bipolar-junction transistors replace the gallium arsenide FETs of FIG. 20, and the dc source voltage is precisely proportioned to respective ones of the transistors irrespective of operating parameter variations in components and/or component drift;

FIG. 22 is a schematic drawing showing how the phase-shifting rf power amplifier of FIG. 6 and the power-shifting rf amplifier of FIG. 7 can be adapted, in accordance with the present invention, so that phase shifting and power shifting are accomplished precisely without variations caused by operating parameter variations in components and/or drift in operating parameters;

FIG. 23 is a schematic drawing showing how the phase-shifting rf power amplifier of FIG. 8 and the power-shifting rf amplifier of FIG. 10 can be adapted, by using precise proportioners for three of the four FETs, to provide phase shifting and power shifting without variations caused by operating parameter variations in components and/or component drift;

FIG. 24 is a shared-current electronic system that is similar to the shared-current electronic system of FIG. 12, except that the processing electronic device and the gallium arsenide FET of FIG. 24 are in both dc series and rf series, and except that the shared-current electronic system of FIG. 24 precisely proportions the dc source voltage between the GaAsFET and the processing electronic device;

FIG. 25 is a shared-current electronic system that is similar to the shared-current electronic system of FIG. 15, except that the bandwidth processing device and the gallium arsenide FET of FIG. 25 are in both dc series and rf series, and except that the shared-current electronic system of FIG. 25 precisely proportions the dc source voltage between the GaAsFET and the bandwidth processing device; and

FIG. 26 is a shared-current electronic system that is similar to the shared-current electronic system of FIG. 18, except that a processing electronic device is connected in dc series with the device and the GaAsFETs of FIG. 18.

DETAILED DESCRIPTION OF THE INVENTION

Referring now to FIG. 1, an rf power amplifier, shared-current electronic system, or electronic apparatus, 10 includes solid-state amplifying devices, solid-state electronic devices, n-channel gallium arsenide field-effect transistors, GaAsFETs, or FETs, Q1 and Q2 that are connected in dc series between a positive dc source voltage, V_(DC) and an electrical ground.

A first rf choke L1 connects the dc source voltage V_(DC) to a drain terminal of the FET Q1, a second rf choke L2 connects a source terminal of the FET Q1 to a drain terminal of the FET Q2, and a resistor R1 connects a source terminal of the FET Q2 to the electrical ground.

The rf power amplifier 10 also includes an rf power splitter 12 and an rf power combiner 14. The rf power splitter 12 is connected to gate terminals of the FETs Q1 and Q2, respectively, by coupling capacitors C1 and C2. The rf power combiner 14 is connected to drain terminals of the FETs Q1 and Q2, respectively, by coupling capacitors C3 and C4. And source terminals of the FETs Q1 and Q2 are connected to the electrical ground by decoupling capacitors C5 and C6, which are represented schematically by boxes that are labeled C5 and C6.

A variable voltage divider VD1, that includes a potentiometer 16 and resistors R2 and R3, is connected to the dc source voltage V_(DC) and supplies a bias voltage to the gate terminal of the FET Q1 through a third rf choke L3. The resistor R1 supplies a negative gate-to-source bias for the gate terminal of the FET Q2 through a fourth rf choke L4.

The resistor R1, in setting the gate-to-source bias for the FET Q2, controls current flow through both FETs, Q1 and Q2. It is important to remember this fact, since other embodiments of the present invention use various means for controlling the gate-to-source bias for the FET Q2, thereby providing means for controlling power amplification of the rf power amplifier 10.

Continuing to refer to FIG. 1, if the dc source voltage is 22.0 volts dc, and if the resistor R1 provides a 2.0 voltage drop between the source terminal of the FET Q2 and the ground, assuming equal current through the FETs, Q1 and Q2, the remaining 20.0 volts will be equally divided, thereby providing 10.0 volts for each FET, Q1 and Q2, with the FET Q1 having 22.0 volts applied to the drain terminal and 12.0 volts applied to the source terminal.

If the potentiometer 16 of the variable voltage divider VD1 is proportioned to provide 10.0 volts to the gate terminal of the FET Q1, a negative gate-to-source bias of 2.0 volts will be provided for the FET Q1. In like manner, with 12.0 volts being applied to the drain terminal of the FET Q2 and 2.0 volts being applied to the source terminal, the electrical ground will be 2.0 volts below the voltage that is applied to the source terminal, thereby providing a negative gate-to-source bias of 2.0 volts for the FET Q2, since the gate terminal of the FET Q2 is connected to the electrical ground through the rf choke L4.

In operation, an input signal at an rf input RF_(IN) is split in the rf power splitter 12, amplified in the FETs Q1 and Q2, and combined in the rf power combiner 14 to provide a power amplified rf output at an rf output RF_(OUT).

The amplification function of the FETs Q1 and Q2 is maintained by using rf chokes, L1, L2, L3, and L4, to keep the rf signal from coupling onto the dc bias lines and to prevent rf interference between the FETs Q1 and Q2. Decoupling capacitors C5 and C6 are used to keep the source terminals of both FETs, Q1 and Q2, at an rf ground.

Referring now to FIG. 2, an rf power amplifier, shared-current electronic system, or electronic apparatus, 20 includes like-numbered and like-named parts, as shown and described in conjunction with FIG. 1, except that the rf power amplifier 20 of FIG. 2 replaces the GaAsFETs Q1 and Q2 of FIG. 1 with n-channel MOSFETs, FETs, solid-state amplifying devices, or solid-state electronic devices, Q3 and Q4 that are connected in series between a positive dc source voltage V_(DC) and an electrical ground.

The MOSFET Q4 operates with a positive bias, so the resistor R1, the decoupling capacitor C6, and the rf choke L4, all of FIG. 1, have been omitted. Instead, a variable voltage divider VD2, that includes a potentiometer 22 and resistors R4 and R19, has been added to provide a bias voltage for the MOSFET Q4. The variable voltage divider VD2 is connected to a gate of the MOSFET Q4 by an rf choke L5.

The rf power amplifier 20 takes advantage of the fact that MOSFETs, such as the MOSFETs Q3 and Q4, will operate at higher voltages than GaAsFETs, such as the GaAsFETs Q1 and Q2 of FIG. 1. For instance, the rf power amplifier 20 may use a 56.0 volt dc source, and the dc source voltage may be equally divided between the MOSFETs Q3 and Q4 which are rated for 28.0 volts dc.

If a 56.0 volt dc source voltage is equally divided, the gate voltage for the MOSFET Q3 is adjusted to 32.0 volts by the variable voltage divider VD1, so that the gate of the MOSFET Q3 is 4.0 volts above its source voltage, such as to set the quiescent operating point of the MOSFET Q3. In like manner, the variable voltage divider VD2 is adjusted to 4.0 volts, so that the gate of the MOSFET Q4 is 4.0 volts above its electrically-grounded source terminal.

Referring now to FIG. 3, an rf power amplifier, shared-current electronic system, or electronic apparatus, 26 includes like-numbered and like-named parts, as shown and described in conjunction with FIG. 1, except that the rf power amplifier 26 of FIG. 3 replaces the GaAsFETs Q1 and Q2 of FIG. 1 with npn bipolar-junction transistors (BJTs), solid-state amplifying devices, or solid-state electronic devices, Q5 and Q6 that are connected in series between a positive dc source voltage V_(DC) and a ground.

Since the BJT Q6 operates with a positive bias, the resistor R1, the decoupling capacitor C6, and the rf choke L4, all of FIG. 1, have been omitted, the variable voltage divider VD2, that includes the potentiometer 22 and the resistors R4 and R19, has been added. The variable voltage divider VD2 is connected to a base of the BJT Q6 by the rf choke L5.

The rf power amplifier 26 takes advantage of the fact that bipolar-junction transistors (BJTs), such as the BJTs Q5 and Q6, will operate at higher voltages than GaAsFETs, such as the GaAsFETs Q1 and Q2 of FIG. 1. For instance, the rf power amplifier 26 may use a 56.0 volt dc source, and the dc source voltage may be equally divided between the BJTs Q5 and Q6.

If a 56.0 volt dc source voltage is equally divided, the base voltage for the BJT Q5 is adjusted to 28.7 volts by the variable voltage divider VD1, so that the base of the BJT Q5 is 0.7 volts above its emitter voltage. In like manner, the variable voltage divider VD2 is adjusted to 0.7 volts, so that the base of the BJT Q6 is 0.7 volts above its grounded emitter.

Operation of the rf power amplifiers, or shared-current electronic systems, 20 and 26, of FIGS. 2 and 3 respectively, can be understood by referring to the detailed description of FIG. 1.

The performance of the rf power amplifiers 10 of FIG. 1, 20 of FIG. 2, 26 of FIG. 3, and all of the current-sharing electronic systems taught herein, rests heavily on correct design and application of the rf chokes, L1, L2, L3, and L4, and especially on the decoupling capacitors, C5 and C6. More particularly, successful rf decoupling depends upon providing an effective series resistance of the decoupling capacitors C5 and C6 that is lower than any porcelain capacitor that resonates at the operating frequency.

Referring now to FIGS. 1–4, and more particularly to FIG. 4, this reduction in the effective series resistance of the decoupling capacitors is achieved by paralleling capacitors as shown in FIG. 4. Any number of capacitors Ca–Cn can be paralleled, and the capacitors can be selected to resonate at the same frequency or at different frequencies.

For operation at a single, fixed frequency, capacitors that resonate at the same frequencies may be selected. However, if a standard capacitor does not resonate at the operating frequency, capacitors that resonate both above and below the operating frequency can be paralleled. In like manner, for operation over a spread of frequencies, a plurality of capacitors, that resonate at various frequencies are paralleled.

Referring again to FIG. 1, the decoupling capacitors C5 and C6 are shown enclosed in a rectangular box indicating that the rf decoupling capacitors are paralleled as shown in FIG. 4. However, all of the decoupling capacitors, in all of the embodiments, should be paralleled as taught by Lautzenhiser et al. in U.S. Pat. No. 6,683,499, whether or not the rf decoupling capacitors are shown enclosed in a box.

Referring now to FIG. 5, an operational amplifier OP1, that is configured as a buffer, has been inserted between the variable voltage divider VD1 and the rf choke L3 of FIG. 1. If the gate current of the FET Q1 changes when the amplifier is tuned across a frequency band or operated over varying environmental conditions, the operational amplifier OP1 prevents varying gate current from affecting the variable voltage divider VD1 and, therefore, the bias of both FETs, Q1 and Q2.

Referring now to FIG. 6, a variable phase-shifting rf power amplifier, shared-current electronic system, or electronic apparatus, 48 includes solid-state amplifying devices, solid-state electronic devices, field-effect transistors, or FETs, Q1 and Q2, that are connected in series between a higher voltage, or positive dc source voltage V_(DC), and a lower voltage, or an electrical ground. That is, the rf choke L1 connects the dc source voltage V_(DC) to the drain terminal of the FET Q1, the rf choke L2 connects the source terminal of the FET Q1 to the drain terminal of the FET Q2, and the resistor R1 connects the source terminal of the FET Q2 to the electrical ground, as described in conjunction with FIG. 1.

The variable phase-shifting rf power amplifier 48 also includes an rf quadrature power splitter 50 and an rf in-phase power combiner 52. The quadrature power splitter 50 is connected to gate terminals of the FETs Q1 and Q2, by the coupling capacitors C1 and C3, respectively. The rf power combiner 52 is connected to the drain terminals of the FETs Q1 and Q2, respectively, by the coupling capacitors C2 and C4. And source terminals of the FETs Q1 and Q2 are connected to an electrical ground by decoupling capacitors C5 and C6, respectively.

A proportioning control 54 provides a variable proportioning voltage V_(P), in response to a proportioning control voltage V_(PC), and supplies the proportioning voltage V_(P) to the gate terminal of the FET Q1 through the rf choke L3 as a variable bias voltage. The resistor R1 supplies a negative gate-to-source bias for the gate terminal of the FET Q2 through the rf choke L4. The resistor R1, in setting the gate-to-source bias for the FET Q2, controls current flow through the FETs, Q1 and Q2, thereby controlling rf power amplification of the variable phase-shifting rf power amplifier 48.

In operation, an rf input signal RF_(IN) of the variable phase-shifting rf power amplifier 48 is phase split in the rf power splitter 50 into rf signals that are phase shifted by 0 and 90 degrees, are amplified in the FETs Q1 and/or Q2 in selected proportions, and are combined in the rf power combiner 52 to provide a power amplified rf output, at an rf output terminal RF_(OUT), that is selectively phase shifted.

Assuming a 10.0 volt dc source, if the proportioning voltage V_(P) is lowered to 0.0 volts dc by the proportioning control 54, 10.0 volts dc will be applied across the FET Q1, and 0.0 volts dc will be applied across the FET Q2. Since the gain of FETs, such as the FETs Q1 and Q2, is approximately a linear function of the drain-to-source voltage, an rf output of the FET Q1 will be at maximum gain while an rf output of the FET Q2 will be at minimum gain.

At this time, the in-phase power combiner 52 will output half of the rf power to the rf output RF_(OUT) and half of the rf power to the internal or external load. More importantly, the half delivered to the rf output terminal RF_(OUT) will be in phase with a first rf signal at an upper rf output terminal 56 of the quadrature power splitter 50, that is disregarding inversion of the FET Q1.

If the proportioning voltage V_(P) is now raised to 10.0 volts dc by the proportioning control 54, 0.0 volts dc will be applied across the FET Q1, and 10.0 volts dc will be applied across the FET Q2. The FET Q1 will now be at minimum gain, while the FET Q2 will be at maximum gain. In this case, the output of the rf in-phase power combiner 52 will be in phase with a second rf signal at a lower rf output terminal 58 of the quadrature power splitter 50. That is, the phase will have been shifted 90 degrees. Again, half of the power is delivered to the rf output RF_(OUT), and half is delivered to the internal or external load.

If the proportioning voltage V_(P) is set to 5.0 volts dc by the proportioning control 54, 5.0 volts dc will be applied across both the FET Q1 and the FET Q2, and both FETs will operate at half gain. In this case, an upper rf input terminal 60 and a lower rf input terminal 62 to the rf in-phase power combiner 52 will be equal in amplitude but 90 degrees out of phase.

At this time, the rf output RF_(OUT) of the rf in-phase power combiner 52 remains at half power but is 45 degrees out of phase with the upper rf input terminal 60. As before, half of the power will be delivered to the internal or external load.

Thus, it can be seen that the proportioning control 54 is effective to shift the phase of the variable phase-shifting rf power amplifier 48, at the rf output RF_(OUT), monotonically, and with reasonable linearity, from 0 to 90 degrees as the proportioning voltage is varied from 0.0 volts dc to 10.0 volts dc.

Finally with regard to FIG. 6, alternately, instead of the quadrature power splitter 50 and the rf in-phase power combiner 52, an in-phase splitter and a quadrature combiner may be used.

Referring now to FIG. 7, a power-shifting rf amplifier, electronic apparatus, or shared-current electronic system, 66 includes like-named and like-numbered parts as shown and described in conjunction with FIG. 6, except that the in-phase combiner 52 has been omitted, so the power-shifting rf amplifier 66 has two rf outputs, RF1 _(OUT) and RF2 _(OUT).

Therefore, operation of the power-shifting rf amplifier 66 of FIG. 7 is the same as described for the phase-shifting rf power amplifier 48 of FIG. 6, except that the rf power is selectively proportioned between the rf outputs, RF1 _(OUT) and RF2 _(OUT), in response to a variable proportioning voltage V_(P) that is generated by the proportioning control 54, instead of being combined into a single, phase-shifted rf output, RF_(OUT), by the in-phase combiner 52 of FIG. 6.

The power-shifting amplifier 66 proportions its rf output between the rf outputs RF1 _(OUT) and RF2 _(OUT), or shifts the total rf output between the rf outputs RF1 _(OUT) and RF2 _(OUT), in response to a proportioning voltage V_(P), and in accordance with both a magnitude of the proportioning voltage V_(P) and a rate of change thereof. The proportioning voltage V_(P) is generated and supplied by the proportioning control 54. The proportioning voltage V_(P), as applied to the gate terminal of the FET Q1, is effective to control gains of both FETs Q1 and Q2 as described in conjunction with the phase-shifting rf amplifier 48 of FIG. 6.

In addition to being able to shift any percentage of the rf output from one rf output, RF1 _(OUT) or RF2 _(OUT) to the other, by varying the proportioning voltage V_(P) both rapidly and with a sufficient change in the proportioning voltage V_(P), the rf output power can be switched almost instantaneously from one of the rf outputs, RF1 _(OUT) or RF2 _(OUT), to the other.

The proportioning control 54 of FIGS. 6 and 7 represents any means for providing the proportioning voltage V_(P) for use as variable gate voltages. While the proportioning voltage V_(P) controls a phase angle of the rf output RF_(OUT) of the phase-shifting rf amplifier 48 of FIG. 6, the proportioning voltage V_(P) selectively shifts rf output power from the rf output RF1 _(OUT) to the rf output RF2 _(OUT) of the power-shifting rf amplifier 66 of FIG. 7.

Therefore, it becomes apparent that whereas the rf amplifier 10 of FIG. 1 fixedly proportions the dc source voltage between, or among, solid-state electronic devices, the phase-shifting rf amplifier 48 of FIG. 6 and the power-shifting rf amplifier 66 of FIG. 7 both variably proportion the dc source voltage between, or among, the solid-state electronic devices.

Even as the phase-shifting rf amplifier 48 of FIG. 6 maintains substantially constant rf power during phase shifting, the power-shifting rf amplifier 66 of FIG. 7 maintains a total rf output of the two rf outputs, RF1 _(OUT) and RF2 _(OUT), that is substantially constant whether the rf output is progressively shifted or switched almost instantaneously.

Since the rf input signal, RF_(IN), has been split by the quadrature power splitter 50, quadrature rf signals are supplied to the gate terminals of the FETs Q1 and Q2, and the rf outputs RF1 _(OUT) and RF2 _(OUT) are in quadrature. But, if an in-phase splitter is substituted for the quadrature power splitter 50, the two rf outputs RF1 _(OUT) and RF2 _(OUT) will be in phase.

Referring now to FIG. 8, a variable phase-shifting rf power amplifier, electronic apparatus, or shared-current electronic system, 70 has a phase-shift range of 270 degrees, as opposed to 90 degrees for the variable phase-shifting rf power amplifier 48 of FIG. 6. The variable phase-shifting rf power amplifier 70 includes a proportioning control 72 that generates variable proportioning voltages V_(P1), V_(P2), and V_(P3) in response to a proportioning control voltage V_(PC). Construction of the proportioning control 72 is described in conjunction with FIG. 11.

The variable phase-shifting rf power amplifier 70 includes a 180 degree power splitter 74, a 90 degree power splitter 76A, a 90 degree power splitter 76B, solid-state amplifying devices, solid-state electronic devices, field-effect transistors, or FETs, Q1, Q2, Q9, and Q10, and 0 degree power combiners 78A, 78B, and 78C. The phase-shifting rf amplifier 70 also includes rf chokes L1, L2, L3, L4, L5, L6, L8, and L9, coupling capacitors C1, C2, C3, C4, C11, C12, C13, and C14, decoupling capacitors C5, C6, C9, and C10, and the resistor R1. As shown in FIG. 8, the FETs, Q1, Q2, Q3, and Q4, are connected in dc series between a positive dc source voltage V_(DC), and an electrical ground.

The 180 degree power splitter 74 of FIG. 8 phase splits the rf input signal RF_(IN) into 0 and 180 degree phase-shifted rf signals, and the 90 degree power splitter 76A, which is connected to the 0 degree output of the 180 degree power splitter 74, splits its output into 0 and 90 degree rf signals, so that 0 and 90 degree phase-shifted rf signals are provided by the 90 degree power splitter 76A at 0 and 90 degree outputs, respectively; and a 180 degree phase-shifted rf signal is provided at the 180 degree output of the 180 degree power splitter 74.

Also, as shown in FIG. 8, the 180 degree output of the 180 degree power splitter 74 is connected to the input of the 90 degree power splitter 76B, so that the output at the 0 degree output of the 90 degree power splitter 76B is not shifted additionally, but remains at 180 degrees. However, the other rf output of the 90 degree power splitter 76B is phase shifted an additional 90 degrees from that of the 180 degree output of the 180 degree power splitter 74, to 270 degrees.

Referring now to FIGS. 8 and 9, an rf signal 80A of FIG. 9 that is not phase shifted is provided by the 0 degree output of the 90 degree power splitter 76A, an rf signal 80B that is phase shifted 90 degrees is provided at the 90 degree output of the 90 degree power splitter 76A, an rf signal 80C that is phase shifted by 180 degrees is provided at the 0 degree output of the 90 degree power splitter 76B, and an rf signal 80D that is phase shifted 270 degrees is provided at the 90 degree output of the 90 degree power splitter 76B.

Assuming a 10.0 volts dc source, if proportioning voltages, V_(P1), V_(P2), and V_(P3), are all at 0.0 volts dc, 10.0 volts dc will be applied across the FET Q1, and 0.0 volts dc will be applied across the FETs Q2, Q9, and Q10. Since the gain of the FETs, Q1, Q2, Q9, and Q10 is approximately a linear function of the applied voltage from drain to source, the FET Q1 will be at maximum gain while the FETs Q2, Q9, and Q10 will be at minimum gain. The rf output RF_(OUT) will then be at 0 degrees relative to the rf input signal RF_(IN), that is disregarding inversion of the FET Q1.

If the proportioning voltage V_(P1) is now raised to 10.0 volts dc and the proportioning voltages V_(P2) and V_(P3) remain at 0.0 volts dc, 10.0 volts dc will be applied across the FET Q2, and 0.0 volts dc will be applied across the FETs Q1, Q9, and Q10. The FET Q2 will now be at maximum gain while the FETs Q1, Q9, and Q10 will be at minimum gain. In this case, the rf output RF_(OUT) will be at 90 degrees relative to the rf input signal RF_(IN), again disregarding inversion of the FET Q2.

Similarly, if the proportioning voltage V_(P1) is at 5.0 volts dc, and the proportioning voltages V_(P2) and V_(P3) are at 0.0 volts dc, the rf output RF_(OUT) will be at 45 degrees relative to the rf input signal RF_(IN). By properly selecting the proportioning voltages V_(P1), V_(P2), and V_(P3), the phase of the phase-shifting rf power amplifier 70 can be made to vary monotonically and reasonably linearly from 0 degrees to 270 degrees. Optionally, the splitters and combiners can be at phase angles other than 0 degrees, 90 degrees, and 180 degrees.

Referring now to FIG. 10, a variable power-shifting rf amplifier, or power-switching amplifier, 82 includes like-named and like-numbered parts as shown and described in conjunction with the phase-shifting rf amplifier 70 of FIG. 8, including the proportioning control 72, except that the power combiners 78A, 78B, and 78C have been omitted, thereby providing four rf outputs, RF1 _(OUT), RF2 _(OUT), RF3 _(OUT), and RF4 _(OUT).

The power-shifting rf amplifier 82 will selectively and progressively shift, or abruptly switch, power between/among the rf outputs RF1 _(OUT), RF2 _(OUT), RF3 _(OUT), and RF4 _(OUT) in response to proportioning voltages V_(P1), V_(P2), and V_(P3).

The proportioning control 72 produces the proportioning voltages V_(P1), V_(P2), and V_(P3) in response to the proportioning control voltage V_(PC). The rf output RF2 _(OUT) is at 90 degrees to the rf output RF1 _(OUT), the rf output RF3 _(OUT) is at 180 degrees to the rf output RF1 _(OUT), and the rf output RF4 _(OUT) is at 270 degrees to the rf output RF1 _(OUT).

Referring now to FIG. 11, the proportioning control 72, which is included in the embodiments of FIGS. 8 and 10, includes amplifiers U1, U2, and U3 which are rail-to-rail operational amplifiers. In addition, the proportioning control 72 includes resistors R7, R8, R9, R10, R11, R12, R13, and R14 that set the gain of the amplifiers, U1, U2, and U3, to be 4. Resistances of the resistors R7, R8, R9, R10, R11, R12, R13, and R14 preferably are 30K, 10K, 30K, 30K, 15K, 30K, 15K and 30K, respectively, but all may be at resistances that are any reasonable multiple or fraction thereof.

Assuming a 10.0 volts dc source, the amplifiers, U1, U2, and U3, are biased to start amplifying at proportioning voltages V_(P) of 0.0, 2.5, 5.0, 7.5, and 10.0 volts respectively.

In response to a proportioning control voltage V_(PC) of 0.0 volts, the proportioning control 72 produces proportioning voltages, V_(P1), V_(P2), and V_(P3), of 0.0 volts dc. In response to increases in the proportioning control voltage V_(PC), the proportioning voltage V_(P1) increases to 10.0 volts while keeping the proportioning voltages V_(P2) and V_(P3) at 0.0 volts dc.

With further increases in the proportioning control voltage V_(PC), when the proportioning voltage V_(P1) reaches 10.0 volts dc, it remains at this level, while the proportioning voltage V_(P2) increases from 0.0 volts to 10.0 volts dc. In like manner, after the proportioning voltages, V_(P1) and V_(P2), both reach 10.0 volts dc, they remain at 10.0 volts dc while additional increases in the proportioning control voltage V_(PC) increase the proportioning voltage V_(P3) from 0.0 to 10.0 volts dc.

Although a detailed construction has been shown and described, the proportioning control 72 is representative of any device, analog or digital, that will produce the proportioning voltages V_(P1), V_(P2), and V_(P3) in response to an analog or digital input, vary the proportioning voltages V_(P1), V_(P2), and V_(P3) in whatever manner is useful for a particular application, and vary them in whatever time frame may be desirable or suitable for an intended use in either the phase-shifting rf amplifier 70 of FIG. 8 or the power-shifting rf amplifier 82 of FIG. 10.

Gains of the FETs Q1, Q2, Q9, and Q10 are selectively varied by varying the proportioning voltages V_(P1), V_(P2), and V_(P3), and applying them to the gates of the FETs Q1, Q2, and Q9. As the proportioning voltages V_(P1), V_(P2), and V_(P3) are selectively varied, the rf output is selectively shifted/proportioned among rf outputs RF1 _(OUT), RF2 _(OUT), RF3 _(OUT), and RF4 _(OUT).

Thus it can be seen that the phase-shifting rf amplifier 48, the phase-shifting rf amplifier 70, the power-shifting rf amplifier 66, and the power-shifting rf amplifier 82 all selectively proportion the dc source voltage between, or among, solid-state electronic devices, whether they be J-FETS, such as GaAsFETs, MOSFETs, bipolar-junction transistors, or any other electronic device.

Referring now to FIG. 12, a shared-current electronic system, or shared-current electronic apparatus, 90 includes like-named and like-numbered parts as those of FIG. 1, except that the GaAsFET Q2, with its associated parts, is omitted, and the GaAsFET Q1 is connected in series with a processing electronic device 92, between the positive dc source voltage V_(DC) and a ground.

The processing electronic device 92 may be any collection or assembly of electronic devices, such as a baseband processor, that provides a desired electronic function. While no input or output communication has been shown between the GaAsFET Q1 and the processing electronic device 92, any suitable connections may be made, to provide any suitable relationship therebetween.

Additional components of the shared-current electronic system 90 are the same as shown and described in conjunction with FIG. 1, except that the power splitter 12 has been omitted, the power combiner 14 has been omitted, and shunt resistors R15 and R16 have been added.

If a current flow requirement for the processing electronic device 92 is greater than that of the GaAsFET Q1, then the resistor R15 can be connected to shunt current around the GaAsFET Q1. Or, if the current flow requirement for the GaAsFET Q1 is greater than that of the processing electronic device 92, then the resistor R16 can be connected to shunt current flow around the processing electronic device 92.

Referring now to FIG. 13, a shared-current electronic system, or shared-current electronic apparatus, 96 includes like-named and like-numbered parts as those of FIG. 12, except that the GaAsFET Q1 has been replaced by the MOSFET Q3, which is connected in series with the processing electronic device 92, between a positive dc source voltage V_(DC) and a ground. Operation is as described for FIG. 12.

Referring now to FIG. 14, a shared-current electronic system, or shared-current electronic apparatus, 100 includes like-named and like-numbered parts as those of FIG. 12, except that the GaAsFET Q1 has been replaced by the bipolar-junction transistor Q5, which is connected in series with the processing electronic device 92, between a positive dc source voltage V_(DC) and a ground. Operation is as described for FIGS. 12 and 13.

FIGS. 15–17 are spectrally-efficient digital modulation systems that utilize the shared-current principle of the present patent application. Various spectrally-efficient digital modulation systems have been developed for the purpose of transmitting more data in a given bandwidth. Among the various modulation systems are the PCM/FM waveform (Tier 0), the shaped-offset QPSK waveform (SOQPSK, Tier I) which doubles the quantity of data that can be transmitted in a given bandwidth, and the multi-h CPM waveform (Tier II) that compresses three times more data in a given bandwidth than the PCM/FM waveform. While the multi-h CPM waveform excels in spectral efficiency, the demodulator is extremely complex and expensive.

While the frequency-compression systems of FIGS. 15–17, and the current-sharing principles thereof, will generate PCM/FM and multi-h CPM waveforms with suitable software, the emphasis herein is on SOQPSK waveforms which provide outstanding gains in spectral efficiency without the complexity and expense that is associated with demodulating the multi-h CPM waveform.

The SOQPSK waveform was invented by Terrance J. Hill. He taught this waveform in his article entitled: An Enhanced, Constant Envelope, Interoperable Shaped Offset QPSK (SOQPSK) Waveform for Improved Spectral Efficiency, published in the Proceedings of the International Telemetering Conference in San Diego, Calif. on October 2000.

As noted above, SOQPSK is a high-spectral efficiency method of modulation that compresses more data into a given bandwidth than conventional methods of modulation. Unfortunately, from a power-consumption standpoint, it is highly inefficient. However, power efficiency is increased tremendously by sharing current of the SOQPSK components with the GaAsFET Q1 that produces the rf output. The power efficiency is further improved by sharing the current flow of the GaAsFET Q1 with a gain block Q11. The gain block Q11, is a solid-state amplifying device, or solid-state electronic device.

In a typical 5.0 watt SOQPSK system, it takes 1.2 amperes at 6.5 volts to generate a bandwidth compressed carrier at a center frequency, and the final 5.0 watt amplifier draws about 1.5 amperes from a 12.0 volt dc source voltage. In prior art SOQPSK systems, operating voltages for both generation of the SOQPSK carrier and the final amplifier are separately provided from an 18.5 volts dc source through linear regulators, thereby resulting in a large percentage of power being lost in voltage regulation. And the total current requirement is 1.2+1.5=2.7 amperes. In contrast, the SOQPSK systems of the present invention share the current for both bandwidth generation and final amplification, so the total current flow for the present invention is only 1.5 amperes. Therefore, a much higher overall efficiency is achieved by the present invention.

Referring now to FIG. 15, a SOQPSK system, shared-current electronic system, or shared-current electronic apparatus, 108, includes a baseband processor, baseband processing device, or processing electronic device, 110, a multiplier/up-converter, or processing electronic device, 112 and two solid-state amplifying devices, or solid-state electronic devices, Q11 and Q12 that are connected in dc parallel with each other, so that the total current used by these four electronic devices flows through a conductor 114. The electronic device Q11 is a gain block (a chip that includes two bipolar-junction transistors), and the electronic device Q12 is a GaAsFET that is used as a driver for the FET Q1. Both electronic devices, Q11 and Q12, provide preamplification for the FET Q1 that produces the rf output RF_(OUT). While the gain block Q11 and the GaAsFET Q12 have been shown, any mixture of solid-state devices, such as gain blocks, BJTs, J-FETS, or MOSFETs, can be used for preamplification, as long as proper bias is provided.

In addition to the variable voltage divider VD1, the GaAsFET Q1, the coupling capacitors C1 and C3, the decoupling capacitor C5, and the rf chokes L1, L2, and L3 of FIG. 1, the SOQPSK system 108 also includes resistors R15, R16, R17, and R18, rf chokes L10, L11, and L12, coupling capacitors C15 and C16, decoupling capacitors C17, C18, and C19, and the conductor 114.

Not only are the baseband processor 110, the multiplier/up-converter 112, the gain block Q11, and the GaAsFET Q12 all in dc parallel, they are also all in dc series with the FET Q1. Therefore, the baseband processor 110, the multiplier/up-converter 112, the gain block Q11, and the GaAsFET Q12 all share current to the GaAsFET Q1 through the conductor 114, thereby greatly increasing the overall power efficiency of the SOQPSK system 108.

If the GaAsFET Q1 requires less current than the total current flow of the components that are below the conductor 114, then the shunt resistor R15 can be used to increase current flow for the components below the conductor 114. Or, if the GaAsFET Q1 requires more current than the total current flow of all of the components that are below the conductor 114, then the shunt resistor R16 can be used to increase current flow for the FET Q1.

The baseband processor 110 uses a frequency command and a modulation input to create a SOQPSK modulated rf signal at about 70.0 MHz. The multiplier/up-converter 112 multiplies and then upconverts (mixes) the 70.0 MHz signal to L-band or S-band (1430.0–1540.0 MHz or 2200.0–2400.0 MHz). The drivers, consisting of the gain block Q11 and the driver GaAsFET Q12, amplify the L-band or S-band signal to a level adequate to drive the GaAsFET Q1.

Referring now to FIG. 16, a SOQPSK system, shared-current electronic apparatus, or a shared-current electronic system, 116 includes the MOSFET Q3 that is connected in dc series with the baseband processor 110 and the multiplier/up-converter 112 of FIG. 15.

Except for replacing the GaAsFET Q1 of FIG. 15 with the MOSFET Q3 of FIG. 16, and except for changes relating to providing a bias for the MOSFET Q3, the SOQPSK systems, 108 and 116, are the same. Therefore, operation of the SOQPSK system 116 can be understood by reading the description of the SOQPSK system 108 of FIG. 15.

Referring now to FIG. 17, a SOQPSK system, shared-current electronic apparatus, or a shared-current electronic system, 118 includes components as shown and described in conjunction with FIG. 15, except that the GaAsFET Q1 of FIG. 15 has been replaced with the bipolar-junction transistor Q5.

Referring finally to FIGS. 15, 16, and 17, and considering the number and types of processing electronic devices, 110, 112, Q11, and Q12, that are connected in dc parallel to each other and in series with the output power device, the GaAsFET Q1, the MOSFET Q3, or the bipolar-junction transistor Q5, it can be understood that once the source of the FET, Q1 or Q3, or the emitter of the bipolar-junction transistor Q5 is decoupled, anything that involves rf signals of the same frequency, or different frequencies, can be connected in series with the GaAsFET Q1, the MOSFET Q3, or the bipolar-junction transistor Q5, provided that the decoupling and rf choking network works for all frequencies in the system.

It follows that, although one solid-state electronic device, such as the GaAsFET Q1, has been shown with at least one processing electronic device, such as the baseband processor 110, with the solid-state electronic device nearest to the dc source voltage, the stack could be inverted with the processing electronic device nearest to the dc source voltage.

Referring now to FIG. 18, an rf power amplifier, electronic apparatus, or shared-current electronic system, 120 includes components that are like-numbered and like-named with those of the rf power amplifier, or shared-current electronic system 10 of FIG. 1, except that a precise proportioner 122 has replaced the variable voltage divider VD1 of FIG. 1.

Operation of the shared-current electronic system 120 is the same as fully described for the shared-current electronic system 10 of FIG. 1, except that the precise proportioner 122 causes a precise proportion of the dc source voltage to be utilized in the FET Q1. This precise proportioning is irrespective to production variations in component operating parameters and subsequent drift in component operating parameters.

The precise proportioner 122 includes an operational amplifier OP2, a variable voltage divider VD3, capacitors C21 and C22, decoupling capacitor C23, and a resistor R21. The variable voltage divider VD3 includes resistors R22 and R23, and a potentiometer 124.

The variable voltage divider VD3 provides a proportioning voltage to a positive terminal of the operational amplifier OP2. The magnitude of the dc proportioning voltage that is applied to the positive terminal of the operational amplifier OP2 is selected by adjusting the potentiometer 124.

Due to the virtual short phenomena that exists between the positive and negative terminals of operational amplifiers, a dc voltage that equals the proportioning voltage on the positive terminal of the operational amplifier OP2 will appear at the negative terminal.

The operational amplifier OP2 forces its positive and negative terminals to be at the same voltage by adjusting its output voltage, which is the bias control for the gate of the GaAsFET Q1, until the lower, or source, terminal of the FET Q1 reaches a dc voltage that is equal to the dc proportioning voltage that is applied to the positive terminal of the operational amplifier OP2 by the variable voltage divider VD3, as selectively adjusted by the potentiometer 124.

The operational amplifier OP2 forces a dc voltage at its negative terminal to equal that applied to a dc proportioning voltage at its positive terminal reference level due to both the virtual short and negligible current into or out of the input and negative input terminals of the operational amplifier OP2. Therefore, there is no voltage drop across the resistor R21. However, the resistance of the resistor R21 must be high enough to appear as a near open circuit to the rf signal at the lower, or source, terminal of the FET Q1.

Even as the purpose of the rf choke L1 is to rf isolate the upper, or drain, terminal of the FET Q1 from the dc source voltage, the purpose of the rf choke L3 is to rf isolate the dc source voltage from the input, or gate, terminal of the FET Q1. The capacitor C23 is a decoupling network containing low, intermediate, and high-frequency decoupling capacitors to prevent any operational amplifier noise from modulating the FET Q1.

The capacitance of the capacitor C21 is chosen to accommodate the frequency response of the power supply VDC ramp voltage, resistances of the resistor R22 and the potentiometer 124, and device characteristics of the FET Q1. The voltage across the capacitor C21 in the steady state equals the voltage across the gate and source terminals of the FET Q1.

As described above, the potentiometer 124, by providing a selectively-adjustable proportioning voltage for the operational amplifier OP2, sets a selective and precisely regulated dc voltage at the source, or lower, terminal of the FET Q1. Therefore, since the percentage of the dc source voltage utilized by the FET Q1 is the difference between the dc source voltage and the dc voltage at the lower, or source, terminal of the FET Q1, the precise proportioner 122 adjustably controls the precise percentage of the dc source voltage that will be utilized in the FET Q1.

Further, typically the dc source voltage is closely regulated. It follows that, with a regulated dc source voltage, and with a precise proportion of the dc source voltage being utilized by the FET Q1, the proportion of the dc source voltage remaining for the FET Q2 is also precisely controlled. Therefore, the precise proportioner 122 precisely proportions the dc source voltage to respective ones of the FETs Q1 and Q2 irrespective of production variations in component operating parameters or subsequent drift in component operating parameters.

Referring now to FIG. 19, an rf power amplifier, electronic apparatus, or shared-current electronic system, 130 includes components that are like-numbered and like-named with those of the rf power amplifier, or shared-current electronic system 26 of FIG. 3, except that the precise proportioner 122 of FIG. 18 has replaced the variable voltage divider VD1 of FIG. 3, and except that a clamped voltage divider 132 of FIG. 19 has replaced the variable voltage divider VD2 of FIG. 3 for biasing the bipolar-junction transistor Q5.

Since operation of the rf power amplifier 26 has been described in detail, and since the rf power amplifiers 26 and 130 function identically, except for precise proportioning of the dc source voltage, a detailed description of the rf power amplifier 130 is unnecessary and would be redundant.

The clamped voltage divider 132 includes an operational amplifier OP3, a variable voltage divider VD4, and a capacitor C24. The variable voltage divider VD4 includes a potentiometer 134 and resistors R24 and R25. The operational amplifier OP3 of the clamped voltage divider 132 functions as described for the precise proportioner 122. That is, the operational amplifier OP3 forces a dc voltage, as selected by the potentiometer 134 and as applied to the positive input terminal, to also appear at its input terminal. Therefore, the operational amplifier OP3 clamps a bias voltage, as selected by the potentiometer 134, to remain constant without regard to bias current drawing by the transistor Q6.

While the clamped voltage divider 132 serves a useful purpose in regulating the bias voltage for the transistor Q6, it should be recognized that it is the precise proportioner 122 that controls the percentages of the dc source voltage that are applied to respective ones of the transistors, Q5 and Q6, irrespective of manufacturing variations in operating parameters of either the transistor Q5 or the transistor Q6, and irrespective of drift in the operating parameters of either the transistors, Q5 or Q6.

Referring now to FIG. 20, an rf power amplifier, electronic apparatus, or shared-current electronic system, 140 includes solid-state electronic devices, GaAsFETS, or FETs Q1 and Q7, decoupling capacitors C5 and C9, coupling capacitors C1, C3, and C8, rf chokes L1, L2, L5, and L7, resistors R5 and R16, and the precise proportioner 122.

An rf signal that is inputted at RF_(IN), is amplified in the FET Q7, and the amplified output of the FET Q7, at the source terminal thereof, is used to drive the FET Q1 by connection to the gate terminal thereof. Since the power output of the FET Q1, and the current drain of the FET Q1, will be greater than the power and current drain of the FET Q7, the resistor R16 is connected to the source terminal of the FET Q1, around the FET Q7, to the electrical ground, thereby providing the required increase in current flow through the FET Q1.

As previously described, the precise proportioner 122 provides both adjustable and precise proportioning of the dc source voltage. Among the advantages of precise proportioning of the dc source voltage are: increased reliability and useful life of the FETS Q1 and Q7, a decrease, or elimination of any tendency toward oscillation, and improved stability of frequency.

Referring now to FIG. 21, an rf power amplifier, electronic apparatus, or shared-current electronic system, 150 includes like-named and like-numbered components as shown and described for the rf amplifier 140 of FIG. 20, except that bipolar-junction transistors, or electronic devices, Q5 and Q8 replace the FETs Q1 and Q7 of the rf amplifier 140, and except that a clamped voltage divider 152 is added to provide a bias voltage for the transistor Q8.

The clamped voltage divider 152 of FIG. 21 includes like-numbered and like-named components as the clamped voltage divider 132 of FIG. 19, except that the resistors R24 and R25 of FIG. 21 fixedly divide the dc source voltage, instead of the bias voltage being adjusted by the potentiometer 124 of FIG. 19.

Referring now to FIG. 22, an rf power amplifier, electronic apparatus, or shared-current electronic system, 160 includes like-named and like-numbered components as those of both the phase-shifting rf power amplifier 48 of FIG. 6 and the power-shifting rf amplifier 66 of FIG. 7, except that the splitter 50 and the combiner 52 of FIG. 6 have been omitted, except that the splitter 50 of FIG. 7 has been omitted, and except that a precise proportioner 162 has been added.

The precise proportioner 162 is identical to the precise proportioner 122 of FIG. 18, except that the variable voltage divider VD3 has been omitted. Instead of including the variable voltage divider VD3, a variable proportioning voltage V_(P) of FIG. 22 is supplied to the positive input terminal of the operational amplifier OP2 by the proportioning control 54 of FIGS. 6 and 7.

Operation of the rf amplifier 160 is as described for the phase-shifting rf amplifier 48 and the power-shifting rf amplifier 66, except for splitting and/or splitting and combining functions, and except for variable precise proportioning of the dc source voltage to the FETs Q1 and Q2 of the rf amplifier 160. That is, in response to the proportioning voltage V_(P) that is supplied by the proportioning control 54 of FIG. 6, the dc source voltage of the rf amplifier 160 is variably and precisely proportioned to respective ones of the FETs Q1 and Q2.

If the splitter 50 and the combiner 52 of FIG. 6 are added to the embodiment of FIG. 22, the result is a phase-shifting rf power amplifier in which the phase of the rf output is shifted precisely without respect to production variations in operating parameters of the FETs Q1 and Q2. And, if the splitter 50 of FIG. 7 is added to the embodiment of FIG. 22, the result is a power-shifting rf amplifier in which the rf output is shifted precisely without respect to production variations in operating parameters of the FETs Q1 and Q2.

Referring now to FIG. 23, an rf power amplifier, electronic apparatus, or shared-current electronic system, 170 includes like-named and like-numbered components as those of both the phase-shifting rf power amplifier 70 of FIG. 8 and the power-shifting rf amplifier 82 of FIG. 10, except that the splitters 74, 76A, and 76B and the combiners 78A, 78B, and 78C of FIG. 8 have been omitted, except that the splitters 74, 76A, and 76B of FIG. 10 have been omitted, and except that three precise proportioners 162, 162A, and 162B have been added.

The precise proportioners 162A and 162B are identical to the precise proportioner 162 of FIG. 22, except for suffix letters added to the second and third ones of the precise proportioners, and except for suffix letters added to the components of the precise proportioner 162 for use in the precise proportioners 162A and 162B.

Operation of the rf amplifier 170 of FIG. 23 is as described for the phase-shifting rf amplifier 70 of FIG. 8 and the power-shifting rf amplifier 82 of FIG. 10, except for the splitters 74, 76A, and 76B and the combiners 78A, 78B, and 78C of the FIG. 8 embodiment, except for the splitters 74, 76A, and 76B of the FIG. 10 embodiment, and except for variable precise proportioning of the dc source voltage among the FETs Q1, Q2, Q9, and Q10. That is, in response to variable proportioning voltages V_(P1), V_(P2), and V_(P3), that are supplied by the proportioning control 72 of FIGS. 8 and 10, the dc source voltage V_(DC) of the rf amplifier 170 of FIG. 23 is variably and precisely proportioned among respective ones of the FETs Q1, Q2, Q9, and Q10.

If the splitters 74, 76A, and 76B and the combiners 78A, 78B, and 78C of FIG. 8 are added to the embodiment of FIG. 23, the result is a phase-shifting rf power amplifier in which the phase of the rf output is shifted precisely without respect to production variations in operating parameters of the FETs Q1, Q2, Q9, and Q10. And, if the splitters 74, 76A, and 76B of FIG. 10 are added to the embodiment of FIG. 23, the result is a power-shifting rf amplifier in which the rf output is selectively and precisely proportioned to various ones of four rf outputs without respect to production variations in operating parameters of the FETs Q1, Q2, Q9, and Q10.

Referring now to FIG. 24, a shared-current electronic apparatus, or shared-current electronic system 180 includes like-named and like-numbered parts as the shared-current electronic system 90 of FIG. 12, except that the processing electronic device 92 is connected in rf series with the FET Q1, so that the processing electronic device 92 and the FET Q1 are connected in both dc series and rf series. Also, the variable voltage divider VD1 of FIG. 12 has been replaced in FIG. 24 with the precise proportioner 122 of FIG. 18.

Operation of the shared-current electronic apparatus 180 of FIG. 24 is as described for the shared-current electronic apparatus 90 of FIG. 12, except that the processing electronic device 92 delivers an rf signal to the FET Q1 for amplification therein. Also, the precise proportioner 122 of FIG. 18, as included in the shared-current electronic apparatus 180, precisely proportions the dc source voltage between the FET Q1 and the processing electronic device 92, thereby enhancing frequency stability, and providing other benefits, as recited previously, irrespective of production variations in component operating parameters, and irrespective of drift in component operating parameters.

Referring now to FIG. 25, a shared-current electronic apparatus, or shared-current electronic system 190 includes like-named and like-numbered parts as the shared-current electronic system 108 of FIG. 15, except that the variable voltage divider VD1 of FIG. 15 has been replaced in FIG. 25 with the precise proportioner 122 of FIG. 18.

It is important to notice that, in both FIGS. 15 and 25, the baseband processing device 110, the multiplier/up-converter 112, the gain block Q11, and the FET Q12 are connected in dc parallel, the baseband processing device 110, the multiplier/up-converter 112, the gain block Q11, and the FET Q12 are connected in dc series with the FET Q1, and all five of these electronic devices are connected in rf series.

Connecting the baseband processing device 110, the multiplier/up-converter 112, the gain block Q11, and the FET Q12 in dc series makes their combined current requirements more nearly equal to that of the FET Q1, which is the power amplifier stage. However, if the FET Q1 requires more or less current flow than the parallel-connected four electronic devices, the resistor R16 or the resistor R15 may be connected to bypass additional current, as needed.

Operation of the shared-current electronic apparatus 190 of FIG. 25 is as described for the shared-current electronic apparatus 108 of FIG. 15, except that the precise proportioner 122 of FIG. 18, as included in the shared-current electronic apparatus 190, precisely proportions the dc source voltage between the FET Q1 and the baseband processing device 110, providing benefits as described previously, irrespective of production variations in component operating parameters, and irrespective of drift in component operating parameters.

Referring now to FIG. 26, a shared-current electronic apparatus, or shared-current electronic system 200 includes like-named and like-numbered parts as the shared-current electronic system 10 of FIG. 1, except that the processing electronic device 92 of FIG. 12 is connected in dc series with the GaAsFETs Q1 and Q2, and except that the resistors R15 and R16 have been added. More importantly, two precise proportioners, 122 and 122A have been added, thereby precisely proportioning the dc source voltage among the FET Q1, the FET Q2, and the processing electronic device 92. The precise proportioner 122 is as shown in FIG. 20, and described therewith. The precise proportioner 122A includes like-named and numbered components with an alphabetic suffix.

Operation of the shared-current electronic apparatus 200 is as described for the shared-current electronic apparatus 10 of FIG. 1, except for dc series connection of the processing electronic device 92 to the FETs Q1 and Q2, which utilizes a precise proportion of the dc source voltage.

Referring again to FIG. 18, one precise proportioner 122 is required for two electronic devices, GaAsFETs Q1 and Q2. Further, as shown in FIGS. 18–26, the required number of precise proportioners, such as the precise proportioners 122 and 122A of FIG. 26, and the precise proportioners 162, 162A, and 162B of FIG. 23, is one less than the number of dc series-connected electronic devices.

The use of a clamped voltage divider, such as the clamped voltage divider 132 of FIG. 19, is advantageous when external bias must be applied, especially for electronic devices that use substantial bias current. However, as previously noted, the clamped voltage dividers, such as the clamped voltage divider 132 of FIG. 19, merely provide a stable bias voltage. It is the precise proportioners, such as the precise proportioner 122 of FIGS. 18 and 19, that precisely proportion the dc source voltage between or among two or more electronic devices, such as the FETs Q1 and Q2 of FIG. 18, and the bipolar-junction transistors Q5 and Q6 of FIG. 19.

As can be seen in FIG. 8, two solid-state electronic devices, such as the FETs Q2 and Q9, are connected in dc series between the dc source voltage V_(DC) and an electrical ground, even though one is connected indirectly to the dc source voltage V_(DC) and the other is connected indirectly to the electrical ground. Further, as can be seen in FIG. 2, one solid-state electronic device, such as the FET Q3, is connected to a higher dc voltage, and an other solid-state electronic device, such as the FET Q4, is connected to a lower dc voltage, even though the FET Q3 is connected directly to the dc source voltage V_(DC) and the FET Q4 is connected directly to the electrical ground.

In summary, the present invention can be characterized as providing apparatus with both constant and variable power, in which at least one solid-state electronic device and at least one other electronic device, whether a solid-state electronic device or a processing electronic device, proportionally or variably share the dc source voltage, and in which a single rf output, or a plurality of rf outputs, are produced.

Further, the present invention can be characterized as providing apparatus in which two or more rf outputs may be phase shifted, in which the total rf output may be variably shifted between/among a plurality of rf outputs, or in which the total rf power may be switched between/among a plurality of rf outputs, all without substantially varying the total rf power, and bandwidth compression is achieved with improved power efficiency.

Most importantly, all of the above functions are performed precisely, without regard to production variations in component operating parameters and/or drift in component operating parameters, because, in the present invention, the dc series-connected electronic devices precisely share predetermined proportions of the dc source voltage, irrespective of production variations in component operating parameters and/or drift in component operating parameters. As described above, precise proportioning of the dc source voltage is achieved by precisely determining the dc voltage used by each of the dc series-connected electronic devices except one. The precise proportions may be fixed, or selectively adjusted. Finally, these precise proportions may be variably controlled for use in phase-shifting and power-shifting rf amplifiers, as taught herein.

While specific apparatus and method have been disclosed in the preceding description, and while representative ones of component numbers have been inserted parenthetically in some of the claims, it should be understood that these specifics have been given for the purpose of disclosing the principles of the present invention, and that many variations thereof will become apparent to those who are versed in the art. Therefore, the scope of the present invention is to be determined by claims appended hereto without any limitation by numbers that may be parenthetically inserted in the claims. 

1. Electronic apparatus (120, 130, 140, 150, 160, 170, 180, 190, or 200) which comprises: a solid-state electronic device (Q1, Q2, Q5, or Q9) that includes higher and lower dc voltage terminals; an other electronic device (Q2, Q7, Q8, Q9, Q10, Q12, 92, 110, or 112) that includes higher and lower dc voltage terminals; means, comprising means (L2) for connecting said lower dc voltage terminal of one of said electronic devices to said higher dc voltage terminal of an other of said electronic devices, for connecting said electronic devices in dc series between a dc source voltage and an electrical ground; means, comprising a capacitor (C5, C6, C9, or C19) that is connected between said lower dc voltage terminal of said one electronic device and said electrical ground, for rf decoupling said dc series-connected electronic devices; and means (122, 122A, 162, 162A, or 162B), being connected to a proportioning voltage and to said one electronic device, for precisely proportioning a preselected percentage of said dc source voltage to said one electronic devices irrespective of production variations of operating parameters in one or both of said electronic devices or drift of said operating parameters in one or both of said electronic devices.
 2. Apparatus (120, 130, 140, 150, 160, 170, 180, 190, or 200) as claimed in claim 1 in which said other electronic device comprises a second solid-state electronic device (Q1, Q2, Q5, Q6, Q7, Q8, Q9, Q10, Q11, or Q12).
 3. Apparatus (180, 190, or 200) as claimed in claim 1 in which said other electronic device comprises a processing electronic device (92, 110, or 112).
 4. Apparatus (190) as claimed in claim 1 in which said other electronic device comprises a baseband processor (110).
 5. Apparatus (190) as claimed in claim 1 in which said other electronic device comprises a multiplier/up-converter (112).
 6. Apparatus (120, 130, 140, 150, 160, 170, 180, 190, or 200) as claimed in claim 1 in which said means for precisely proportioning comprises means (VD3, 54, or 72) for precisely proportioning varying percentages of said dc source voltage to said one electronic device.
 7. Apparatus (120, 130, 140, 150, 160, 170, 180, 190, or 200) as claimed in claim 1 in which; said dc source voltage comprises a regulated dc source voltage; and said means for precisely proportioning comprises means (VD3, 54, or 72) for precisely proportioning varying and inverse percentages of said dc source voltage to respective ones of said electronic devices.
 8. A method which comprises: a) connecting a first electronic device and a second electronic device in dc series between a dc source voltage and an electrical ground; b) rf decoupling said electronic devices; and c) precisely proportioning preselected percentage of said dc source voltage to one of said electronic devices irrespective of production variations of operating parameters in one or both of said electronic devices.
 9. A method as claimed in claim 8 in which said step of precisely proportioning comprises precisely proportioning varying percentages of said dc source voltage to said one electronic device.
 10. Electronic apparatus (180, 190, or 200) which comprises: a processing electronic device (92, 110, or 112) having higher and lower dc voltage terminals; a solid-state electronic device (Q1 or Q2) having higher and lower dc voltage terminals; means, comprising means (L2) for connecting said lower dc voltage terminal of one of said devices to said higher dc voltage terminal of an other of said devices, for connecting said devices in dc series between a dc source voltage and an electrical ground; and means (122 or 122A), being connected to a proportioning voltage and to said one electronic device, for precisely proportioning a preselected percentage of said dc source voltage to said one electronic device irrespective of production variations of operating parameters in one or both of said electronic devices or drift of said operating parameters in one or both of said electronic devices.
 11. Apparatus (190) as claimed in claim 10 in which said processing electronic device comprises a baseband processor (110).
 12. Apparatus (190) as claimed in claim 10 in which: said apparatus further comprises a second electronic device (112, Q11, or Q12); and said processing electronic device (92, 110, or 112) and said second electronic device are connected in dc parallel and rf series.
 13. Apparatus (190) as claimed in claim 10 in which said processing electronic device comprises a baseband processor (110); and said apparatus comprises a third electronic device (112, Q11, or Q12), that is interposed, in rf series, between said processing electronic device and said solid-state device (Q1).
 14. A method which comprises: a) rf series connecting a processing electronic device to a first solid-state electronic device; b) dc series connecting said first solid-state electronic device and said processing electronic device with a dc source voltage and an electrical ground; c) decoupling said electronic devices; and d) precisely proportioning s selected percentage of said dc source voltage to one of said electronic devices irrespective of production variations in operating parameters of either or both of said electronic devices.
 15. A method as claimed in claim 14 in which said rf series connecting step comprises connecting an other solid-state electronic device in rf series between said processing electronic device and said first solid-state electronic device.
 16. A method as claimed in claim 14 in which: a) said rf series connecting step comprises connecting an other solid-state electronic device in rf series between said processing electronic device and said first solid-state electronic device; and b) said method further comprises connecting said processing electronic device and said other solid-state electronic device in dc parallel.
 17. A method which comprises: a) connecting first and second electronic devices in dc parallel; b) connecting said first and second parallel-connected electronic devices and a third electronic device in dc series between a dc source voltage and an electrical ground; c) connecting said first, second, and third electronic devices in rf series; and d) precisely proportioning a selected percentage of said dc source voltage to one of said electronic devices irrespective of production variations in operating parameters of any of said electronic devices and/or drift of any of said electronic devices.
 18. Apparatus (120, 130, 140, 150, 160, 170, 180, 190, or 200) as claimed in claim 1 in which said means for precisely proportioning, and said connection thereof to said proportioning voltage and to said one electronic device, comprises an operational amplifier (OP2 or OP3) that is connected to said proportioning voltage, that is connected to said lower dc voltage terminal of said one processing electronic device (Q1, Q2, Q5, Q6, Q7, Q8, Q9, Q10, Q11, Q12, 92, 110, or 112), and that is connected to a control terminal of said one solid-state electronic device.
 19. Apparatus (120, 130, 140, 150, 180, 190, or 200) as claimed in claim 18 in which said proportioning voltage comprises a selected percentage of said dc source voltage.
 20. Apparatus (120, 130, 140, 150, 180, 190, or 200) as claimed in claim 18 in which said proportioning voltage comprises a variable percentage of said dc source voltage.
 21. Apparatus (120, 130, 140, 150, 180, 190, or 200) as claimed in claim 18 in which said apparatus comprises a voltage divider (VD3) that is connected to said dc source voltage and to said electrical ground; and said connection of said means for precisely proportioning to said proportioning voltage comprises connection of said means (122 or 122A) for precisely proportioning to said voltage divider.
 22. Apparatus (120, 130, 140, 150, 180, 190, or 200) as claimed in claim 18 in which: said apparatus comprises a voltage divider (VD3) that includes a potentiometer (124 or 134) that is connected to said dc source voltage and to said electrical ground; and said connection of said means for precisely proportioning to said proportioning voltage comprises connection of said means (122 or 122A) for precisely proportioning to said potentiometer.
 23. Apparatus (160 or 170) as claimed in claim 18 in which: said apparatus comprises a proportioning control (54 or 72) that produces a proportioning voltage (V_(P), V_(P1), V_(P2), or V_(P3)); and said connection of said means for precisely proportioning to said proportioning voltage comprises connection of said means for precisely proportioning to said proportioning voltage.
 24. Apparatus (170 or 200) as claimed in claim 1 in which said apparatus further comprises: a third electronic device (Q9, Q10, 92, 110, or 112) that is interposed intermediate of said other electronic device (Q2 or Q9) and said electrical ground, and that is connected in dc series between said other electronic device and said electrical ground; and means (122A, 162A, or 162B), being connected to a second proportioning voltage and to said other electronic device, for precisely proportioning preselected percentage of said dc source voltage to said other electronic device irrespective of production variations of operating parameters or drift of said operating parameters in any of said electronic devices.
 25. A method as claimed in claim 8 in which said method further comprises connecting said electronic devices in rf series.
 26. A method as claimed in claim 8 in which said method further comprises connecting a third electronic device in dc parallel with one of said electronic devices.
 27. A method as claimed in claim 8 in which said method further comprises: a) connecting a third electronic device in dc parallel with one of said electronic devices; and b) connecting two of said electronic devices in rf series.
 28. A method as claimed in claim 8 in which said method further comprises: a) splitting an rf input into two rf signals; and b) separately amplifying said rf signals, in respective ones of said electronic devices, into two separate rf outputs.
 29. A method as claimed in claim 28 in which said method still further comprises combining said separately-amplified rf signals into a single rf output.
 30. A method as claimed in claim 28 in which: a) said splitting step comprises splitting said rf input into in-phase and quadrature rf signals; b) said method further comprises combining said separately-amplified rf signals into a single rf output; and c) said method still further comprises phase shifting said rf output.
 31. A method as claimed in claim 28 in which said method still further comprises selectively proportioning a total rf output between said separate rf outputs.
 32. A method as claimed in claim 28 in which said method still further comprises selectively switching a total rf output between said separate rf outputs.
 33. A method as claimed in claim 8 in which said method further comprises: a) connecting two additional electronic devices in dc series with said solid-state electronic device and said other electronic device; b) splitting an rf input into in-phase, 90 degree, 180 degree, and 270 degree rf signals; and c) separately amplifying said split rf signals, in respective ones of said electronic devices, into four separate rf outputs.
 34. A method as claimed in claim 33 in which said method further comprises: a) combining said separately-amplified rf signals into a single rf output; and b) selectively phase-shifting said combined rf output.
 35. A method as claimed in claim 33 in which said method further comprises selectively proportioning percentages of a total rf power to selected ones of said rf outputs.
 36. A method as claimed in claim 33 in which said method further comprises selectively switching a total rf power to selected ones of said rf outputs.
 37. A method as claimed in claim 8 in which said method further comprises: a) increasing current flow through one of said electronic devices without increasing current flow through both of said electronic devices; and b) said increasing step comprises shunting.
 38. Apparatus (180, 190, or 200) as claimed in claim 10 in which said means for precisely proportioning, and said connection thereof to said proportioning voltage and to said one electronic device, comprises an operational amplifier (OP2 or OP3) that is connected to said proportioning voltage, that is connected to said lower dc voltage terminal of said one processing electronic device (Q1, Q2, 92, 110, or 112), and that is connected to a control terminal of said one solid-state electronic device.
 39. Apparatus (180, 190, or 200) as claimed in claim 38 in which said proportioning voltage comprises a variable percentage of said dc source voltage.
 40. Apparatus (180, 190, or 200) as claimed in claim 38 in which said apparatus comprises a voltage divider (VD3) that is connected to said dc source voltage and to said electrical ground; and said connection of said means for precisely proportioning to said proportioning voltage comprises connection of said means (122 or 122A) for precisely proportioning to said voltage divider.
 41. A method as claimed in claim 14 in which said method further comprises: a) increasing current flow through one of said electronic devices without increasing current flow through both of said electronic devices; and b) said increasing step comprises shunting.
 42. A method as claimed in claim 8 in which said method further comprises: a) interposing a third solid-state device in dc series with said electronic devices; and b) precisely proportioning an other selected percentage of said dc source voltage to an other of said electronic devices irrespective of production variations of operating parameters in any of said electronic devices.
 43. Apparatus (170 or 200) as claimed in claim 10 in which said apparatus further comprises: a third electronic device (Q2 or Q9) that is interposed in dc series between said solid-state electronic device (Q1 or Q2) and said processing electronic device (92, 110, or 112); and means (122A, 162A, or 162B), being connected to a second proportioning voltage and to said third electronic device, for precisely proportioning a preselected percentage of said dc source voltage to said third electronic device irrespective of production variations of operating parameters or drift of said operating parameters in any of said electronic devices.
 44. A method as claimed in claim 17 in which said step of connecting first and second electronic devices in dc parallel comprises connecting a baseband processor and a multiplier/up-converter in dc parallel. 